(a) Field of the Invention
The present invention relates to a display device, a display panel therefor, and an inspection method thereof.
(b) Description of the Related Art
An active type display device such as an active matrix (AM) liquid crystal display (LCD) and an active matrix organic light emitting display (OLED) includes a plurality of pixels arranged in a matrix and including switching elements and a plurality of signal lines such as gate lines and data lines for transmitting signals to the switching elements. The switching elements of the pixels selectively transmit data signals from the data lines to the pixels in response to gate signals from the gate lines for displaying images. The pixels of the LCD adjust transmittance of incident light depending on the data signals, while those of the OLED adjust luminance of light emission depending on the data signals.
The display device further includes a gate driver for generating and applying the gate signals to the gate lines, a data driver for applying the data signals to the data lines, and a signal controller for controlling the gate driver and the data driver.
Recently, the gate driver is integrated on one of the panels together with the switching elements for a narrow bezel and cost reduction (which is referred to as GIL (gate ICless) configuration). For this integration, the gate driver is required to have a simple circuital configuration.
Such a gate driver usually includes a shift register including a series of stages and each stage includes a plurality of transistors. Each stage outputs a gate signal based on a scanning start signal or an output signal of a previous stage and at least a clock signal, and the scanning start signal and the clock signals are supplied from the signal controller through a plurality of signal lines formed on the panel.
Meanwhile, a visual inspection (VI) is executed to inspect the status of gate lines and data lines of a display device. In GIL configuration, a test pad for inspecting the disconnection of the gate lines is provided on the panel and connected to the signal lines for transmitting the scanning signals and the clock signals. For visual inspection, a single test signal having a voltage level for turning on the transistors of the stages of the shift register is applied to the test pad such that the stages can generate a high level voltage to turn on the switching elements of the pixel.
However, the stages may still generate the high level voltage although only a few of the transistors in the stages normally operate, while other transistors do not. Accordingly, the defect of the stages cannot be exactly checked.
Furthermore, since all the stages output and apply the high level voltage to the gate lines at the same time, the inspection for the individual gate lines is not allowed and thus defects such as short circuit between adjacent gate lines may not be detected.